As may be appreciated, a multi-core processor is designed based on a multi-core processor architecture to include two or more processor-based computational engines or ‘cores’ within a single computing device. Typically, although not necessarily, such a multi-core processor is mounted to a computing device in a single processor socket, but the operating system operating on the computing device perceives each executing core of the multi-core processor as a discrete logical processor, with all associated execution resources.
Generally, a multi-core processor and the architecture thereof are intended to implement a strategy of increasing performance by dividing work performed by a typical single-core processor into discrete portions and executing each portion at a particular core, thereby performing more work within a given processor clock cycle. To enable the full use of a multi-core processor, then, a particular application running on the processor must be constructed to assign application work portions or ‘threads’ across the available cores.
Notably, a multi-core processor can execute completely separate threads of code from one application or from multiple applications, all in parallel. For example, such a multi-core processor with two cores can execute a thread from an application on a first core and a thread from an operating system on a second core in parallel, or parallel threads on the first and second cores from the application. Similarly, with higher numbers of cores, such a multi-core processor can execute a multitude of variations of threads from multiple applications and operating systems, all in parallel. As should now be appreciated, with such parallel processing over multiple cores, a multi-core processor offers true parallel multitasking on a computing device, as opposed to sequential pseudo-multitasking. Such true parallel multitasking may for example include a home user editing a picture while recording a video feed, or an office user copying data from a server while running an environmental monitoring application.
With true parallel multitasking, a multi-core processor can be employed to improve responsiveness in any computing device environment where a user is actively working in two or more applications, or when background applications compete with each other and with user applications for processing time. Thus, multiple processor-intensive tasks may be performed on a computing device with less issues such as freezing, excessive time lags, unprompted halts, irregular performance, audio and/or video distortion, and the like.
Note, however, that an issue arises in the situation where a particular application is constructed to employ one number N of cores of a multi-core processor on a computing device, and such multi-core processor in fact has another number M of cores. In the one circumstance where N is greater than M such that the M-core processor has less cores than the N-core application is constructed to employ, the work of the N-core application most likely must be assigned to the cores of the M-core processor in a manner not originally intended. For example, if the application is a 4-core application expecting 4 cores and the processor in fact has 2 cores, the work that was originally divided by the application into 4 portions for processing by 4 cores must somehow now be assigned to the 2 available cores by the operating system of the computing device or the like, perhaps by doubling up such portions. As may be appreciated, such re-assigning is likely performed by the operating system or the like on an ad hoc basis and without any knowledge of a preferred method to be employed, if indeed such a method exists. Accordingly, such re-assigning likely results in inefficiencies and could under some circumstances even cause errors or even fatal errors.
In the other circumstance where M is greater than N such that the M-core processor has more cores than the N-core application is constructed to employ, the M-core processor at least some of the M cores of the processor are not employed even though possibly available. For example, if the application is a 4-core application expecting 4 cores and the processor in fact has 8 cores, the work that was originally divided by the application into 4 portions for processing by 4 cores could have been even further divided into 8 portions, but instead is only performed by 4 of the cores of the 8-core processor, with the other 4 cores being idle at least with regard to the application. As may be appreciated, such idle cores represent wasted capacity and by extension a wasted opportunity to operate the application faster and/or more efficiently.
Accordingly, a need exists for a system whereby an N-core application constructed to operate on an N-core processor is in fact operated efficiently on an M-core processor, where M is greater than or less than N. In particular, a need exists for such a system where the N-core application is operated as if on an N-core processor even though in fact on an M-core processor. More particularly, a need exists for such a system where the N-core application is operated on a virtual machine that emulates an N-core processor, and that re-assigns the work of the application to the M-core processor in an efficient manner.